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  AON2812 general description product summary v ds i d (at v gs =10v) 4.5a r ds(on) (at v gs =10v) < 37m r ds(on) (at v gs =4.5v) < 45m r ds(on) (at v gs =2.5v) < 70m typical esd protection hbm class 3a applications 30v dual n-channel alphamos 3000 orderable part number package type form minimum order quantity 30v absolute maximum ratings t a =25c unless otherwise noted AON2812 ? trench power alphamos ( mos lv) technology ? low r ds(on) ? low gate charge ? esd protection ? rohs and halogen-free compliant ? battery protection switch ? mobile device battery charging and discharging ? load switch dfn 2x2 tape & reel g1 d 1 s1 g2 d2 s2 dfn 2x2 top view bottom view pin 1 pin 1 s1 g1 d2 d1 d1 d2 s2 g2 symbol v ds v gs i dm t j , t stg symbol t 10s steady-state t a =25c thermal characteristics w i d 18 4.5 t a =25c t a =70c maximum junction-to-ambient a c/w r ja 40 65 50 c/w maximum junction-to-ambient a d 80 parameter max c units junction and storage temperature range -55 to 150 typ va absolute maximum ratings t a =25c unless otherwise noted 12 v maximum units power dissipation b 1.6 t a =70c p d 30 2.5 gate-source voltage pulsed drain current c 3.5 parameter drain-source voltage continuous drain current g rev.1.0: february 2014 www.aosmd.com page 1 of 5 downloaded from: http:///
symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 10 a v gs(th) gate threshold voltage 0.6 1 1.4 v 30 37 t j =125c 41 50 35 45 50 70 g fs 10 s v sd 0.75 1 v i s 3 a c iss 235 pf c oss 75 pf c rss 15 pf r g 4 8 12 q g (10v) 4.5 10 nc q g (4.5v) 2.2 6 nc q gs 0.3 nc q gd 0.7 nc t d(on) 3 ns t r 3 ns t d(off) 24 ns m v gs =10v, v ds =15v, i d =2a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage id=250 a, vgs=0v r ds(on) static drain-source on-resistance gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v ds =0v, v gs =10v maximum body-diode continuous current input capacitance gate-body leakage current turn-off delaytime v gs =10v, v ds =15v, r l =7.5 , r gen =3 diode forward voltage dynamic parameters v gs =2.5v, i d =1a turn-on rise time reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz v ds =v gs, i d =250 a output capacitance forward transconductance i s =1a,v gs =0v v ds =5v, i d =2a v gs =10v, i d =2a v gs =4.5v, i d =1a t d(off) 24 ns t f 6 ns t rr 7.2 ns q rr 1.3 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge body diode reverse recovery time i f =2a, di/dt=100a/ s turn-off delaytime turn-off fall time r gen =3 i f =2a, di/dt=100a/ s a. the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the value in any given application depends on the user' s specific board design. b. the power dissipation p d is based on t j(max) =150 c, using 10s junction-to-ambient thermal resistance. c. repetitive rating, pulse width limited by junct ion temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initialt j =25 c. d. the r ja is the sum of the thermal impedance from junction t o lead r jl and lead to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-ambien t thermal impedance which is measured with the devi ce mounted on 1in 2 fr-4 board with 2oz. copper, assuming a maximum junction temperatur e of t j(max) =150 c. the soa curve provides a single pulse rating. rev.1.0: february 2014 www.aosmd.com page 2 of 5 downloaded from: http:///
typical electrical and thermal characteristics 0 4 8 12 16 20 0 1 2 3 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 10 20 30 40 50 60 70 80 0 2 4 6 8 r ds(on) (m ? ) i d (a) figure 3: on - resistance vs. drain current and gate 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =10v i d =2a v gs =4.5v i d =1a v gs =2.5v i d =1a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 4 8 12 16 20 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =1.5v 2v 4.5v 10v 3v 2.5v v gs =2.5v d figure 3: on - resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 0 20 40 60 80 0 2 4 6 8 10 r ds(on) (m ? ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =2a 25 c 125 c rev.1.0: february 2014 www.aosmd.com page 3 of 5 downloaded from: http:///
typical electrical and thermal characteristics 0 2 4 6 8 10 0 1 2 3 4 5 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 50 100 150 200 250 300 350 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 50 100 150 200 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) c oss c rss v ds =15v i d =2a t j(max) =150 c t a =25 c 10 s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) v > or equal to 2.5v 10 s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 s 10ms pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z ? ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse v gs > or equal to 2.5v figure 9: maximum forward biased safe operating area (note f) r ja =80 c/w rev.1.0: february 2014 www.aosmd.com page 4 of 5 downloaded from: http:///
- + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off l unclamped inductive switching (uis) test circuit & waveforms vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev.1.0: february 2014 www.aosmd.com page 5 of 5 downloaded from: http:///


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